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  • Machine / Process Development Analysis and simulation of machine designs using Engineering calculations and analysis software Design reviews of new mechanisms and machines Cost reduction Optimization of mechanisms, structure to reduce cost Reduce failures in 1st time design by simulation

  • We have an urgent opening for Engineer/Sr.Engineer-Design UG NX with a Japanese in Gurgaon. Job Responsibilities: Designing using Siemens Unigraphics NX. Ability to analyse specifications and design inputs (GT Power and CFD etc) Knowledge of complex part design and surface modelling. Design

  • We have an urgent opening for Engineer/Sr.Engineer-Design UG NX with a Japanese in Gurgaon. Job Responsibilities: Designing using Siemens Unigraphics NX. Ability to analyse specifications and design inputs (GT Power and CFD etc) Knowledge of complex part design and surface modelling. Design

  • e have an urgent opening for Engineer/Sr.Engineer-Design UG NX with a Japanese in Gurgaon. Job Responsibilities: Designing using Siemens Unigraphics NX. Ability to analyse specifications and design inputs (GT Power and CFD etc) Knowledge of complex part design and surface modelling. Design

  • e have an urgent opening for Engineer/Sr.Engineer-Design UG NX with a Japanese in Gurgaon. Job Responsibilities: Designing using Siemens Unigraphics NX. Ability to analyse specifications and design inputs (GT Power and CFD etc) Knowledge of complex part design and surface modelling. Design

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Communication Skill & Learning Attitude. Roles & Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage

  • Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage as desired Run gate level simulation Work

  • Responsibilities Work on SoC/Sub-system/IP verification projects for our customers Define and develop Verification environment using SV/UVM or other methodology Define Test plan, develop test cases and verify the design Achieve code and functional coverage as desired Run gate level simulation Work

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