UST Global is currently researching for Memory Design Engineers.To be considered for this role, you will have a Bachelor in Engineering or equivalent, and 3 to 9 years of experience.
We would love to hear from you: If ,
You have good exposure to VLSI design,Knowledge of design principles and practices.
You are strong in understanding of SRAM/ROM architecture, key SRAM blocks viz. Sense Amplifiers, Row Decoders, IOs etc, # If you are proficient in DRC/LVS/parasitic extraction/Spice simulations,
You have good experience in circuit design, IC layout, UNIX scripts, and CAD verification,
Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles.
it is cmm level 5 company