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10 jobs found for Verilog Field

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  • Specman 9+ years' experience with RTL simulators 9+ years' experience debugging in RTL Additional Preferred Requirements: Experience with Synopsys Verilog Compiler Simulator (VCS) Experience with Verilog Experience with debug tools such as Verdi Experience with SoC integration and validation Inside

  • or MS degree with 12 years related experience with defining IP microarchitecture, RTL coding, understanding area/power/performance trade-offsCandidates must have following:Strong logic design skills and experience in System Verilog / Verilog / VHDL* Strong analytical ability, problem solving

  • Verilog / Verilog / VHDL* Strong analytical ability, problem solving and communication skills Good understanding of ASIC design flow, validation concepts like ATG, test plan writing, functional coverage etc. Coursework in relevant areas of programming, computer graphics, digital design and computer

  • in Electronics/EC/Computer Science Engineering fields - Working knowledge of RTL coding (system Verilog, Verilog, vhdl, etc.) - Good knowledge of scripting languages such as Perl or Unix scripting (BASH, CSH) - Minimum of 3 months college experience with computer architecture and digital logic - Minimum of 3 months college

  • in Custom digital and/or Register File design, and Section/Full-Chip level convergence, Timing Analysis, Floor planning - Familiarity with Verilog/VHDL - Strong verbal and written communication skills - Hands on Logic Design experience is a plus Inside this Business Group The Platform Engineering Group

  • in Custom digital and/or Register File design, and Section/Full-Chip level convergence, Timing Analysis, Floor planning - Familiarity with Verilog/VHDL - Strong verbal and written communication skills - Hands on Logic Design experience is a plus Inside this Business Group The Platform Engineering Group

  • Candidate should possess strong digital design and VLSI fundamentals. Knowledge of VHDL, Verilog, C/System-C/System-Verilog/Specman, micro-architecture development, Signal processing, filters, data-path designs, communication systems standards (DSL, WLAN, Ethernet), processor IP cores (MIPS, ARC ...

  • Design Experience, with experience in Custom digital and/or Register File design, and Section/Full-Chip level convergence, Timing Analysis, Floor planning - Familiarity with Verilog/VHDL - Strong verbal and written communication skills - Hands on Logic Design experience is a plus Inside this Business

  • in Synthesis based design, Custom digital and/or Register File design, and Section/Full-Chip level convergence, Timing Analysis, Floor planning - Familiarity with Verilog/VHDL - Strong verbal and written communication skills - Hands on Logic Design experience is a plus Inside this Business Group The Platform

  • in Synthesis based design, Custom digital and/or Register File design, and Section/Full-Chip level convergence, Timing Analysis, Floor planning & Full-Chip/Block level layout, Familiarity with Verilog/VHDL, Strong verbal and written communication skills.Hands on Logic Design experience is a plus Inside

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