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620 jobs found for Lead Physical Design Engineer Hyderabad

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  • Hands on experience with Implementation (PnR & Signoff) of multimillion gate SoC designs in cutting edge process technologies (40nm, 28nm, 16nm, 10nm) Should have handled Netlist to GDS II implementation at Chip/partition level for atleast 2-3 designs

  • Hands on experience with Implementation (PnR & Signoff) of multimillion gate SoC designs in cutting edge process technologies (40nm, 28nm, 16nm, 10nm ...

  • Responsible for supporting Synthesis, Place and Route flows for various designs at the 7nm and 16nm technology nodes Tool version qualification & deployment of new features into the flow Updating existing flows for new capabilities as required

  • Lead all aspects of SoC Physical Design with strong expertise in the area of chip/partition floor-planning, design partition creation, budgeting and feedthrough planning Edu.-B.E/B.tech/M.E/M.tech. Exp-5-10 yrs

  • identify/troubleshoot application code-related issues; and review and provide feedback to the final user documentation. Support production environments. - Strong Software Engineering background in Core Java/Java EE technology stack. - Strong coding, testing and debugging skills, experience with unit testing. - Hands

  • Hadoop Support Lead - J.P. Morgan Intelligent Solutions Description: (JPMIS) transforms JPMC data assets to create and commercialize information and solutions that enable consumers, businesses and governments to make better decisions and achieve their objectives. As a Hadoop Support Lead you

  • organizational models, wireframes and composites (for all digital channels; web, tablet, mobile, kiosk) - conduct A/B testing and user studies - confer with other UX teams to gain consensus when necessary - recommend and document the user experience, UI behaviors and design : - 5+ years as user experience lead ...

  • asset management, and private equity. Global Security Technology (GST) within Corporate Technology & Risk provides strategic application development and production support to the firm wide Global Security & Investigations. This organization is responsible for all aspects of security including physical

  • related tools like VISIO, Rationalrose. Experience with Oracle10g+ Database, SQL, PL/SQL programming. Nice to have experience in Search engines like Elastic, Apache SOLR. Nice to have experience with Linux shell scripts. Should be comfortable with Onsite/Offshore development mode ...

  • related tools like VISIO, Rationalrose. Experience with Oracle10g+ Database, SQL, PL/SQL programming. Nice to have experience in Search engines like Elastic, Apache SOLR. Nice to have experience with Linux shell scripts. Should be comfortable with Onsite/Offshore development mode ...

  • lifecycle of assigned projects, influencing decisions on architecture, design, and functionality to keep programs on track in terms of budget, time, and customer expectations Effectively leverage product capability, driving standardization, limiting customization, and maximizing reuse of content developed Qualifications/Requirements: Bachelor's Degree in Software, Electrical, Computer or comparable ...

  • troubleshooting guidelines to ensure proper and timely resolution. Work closely with Priority One and Production Assurance teams during problem identification and root cause analysis. Will determine root cause and restore service if listed as lead resolver of an issue. Independently make timely calls

  • Internet zone configuration on DCs, use of DCs for Internet browsing) o Service account configurations Assist with Identity management design and implementation, including: o Provisioning and de-provisioning processes o Management of privileged groups and accounts Be able to provide input where

  • Exp: 7 - 12 years Complete understanding of DFT concepts and flow (scan/ATPG/Memory BIST/ Bscan, Vtran/Simutest) Develop/Plan complete DFT/test strategy for the device as per SOW Create DFT implementation plan, delegate to team members and tracking Test mode timing support/debug and closure at full chip level Handle post-silicon pattern generation, Validation and ATE debug/support DFT specification ...

  • Complete understanding of DFT concepts and flow (scan/ATPG/Memory BIST/ Bscan, Vtran/Simutest) Develop/Plan complete DFT/test strategy for the device as per SOW Create DFT implementation plan, delegate to team members and tracking Test mode timing support/debug and closure at full chip level Handle post-silicon pattern generation, Validation and ATE debug/support DFT specification creation Complete ...

  • * Ability to fully develop a memory architecture * Strong circuit design and simulations skills functional simulations in Verilog physical design (layout) skills

  • Lead all aspects of Discipline Design related to the projects internally and externally Should have executed ELV projects for intelligent industrial building control systems for industries like- Pharma, Semiconductors, food industries, Data Centers, Clean room etc ...

  • -collaborative automation & robotic systems -product development cycle i.e., concept design,, functional prototyping, design development, testing & validation & manufacturing support -vendor management -7 years of hands-on experience designing electromechanical products -hands-on prototyping, design & assembly of test fixtures &equipment -injection molding, metal casting, machining, and sheet metal fabrication is ...

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