Try another search here
Not your type of job? Try your own search. Ok, got it

Want to receive similar jobs about "Design Verification Engineer" by email?

Alert me

FiltersFilter search results

  • City
    • (1325)
    • (1017)
    • (773)
    • (459)
    • (294)
    • View more »
    • (257)
    • (216)
    • (213)
    • (183)
    • (174)
    • (56)
    • (54)
    • (53)
    • (43)
    • (36)
    • (34)
    • (32)
    • (31)
    • (31)
    • (30)
    • (30)
    • (28)
    • (23)
    • (23)
    • (22)
  • State
    • (2710)
    • (1154)
    • (1094)
    • (639)
    • (318)
    • View more »
    • (283)
    • (155)
    • (144)
    • (80)
    • (77)
    • (67)
    • (51)
    • (47)
    • (30)
    • (29)
    • (19)
    • (14)
    • (13)
    • (10)
    • (9)
    • (7)
    • (5)
    • (4)
    • (2)
    • (2)
    • (2)
    • (1)
    • (1)
    • (1)
    • (1)
  • Category
    • (2866)
    • (1691)
    • (422)
    • (341)
    • (226)
    • View more »
    • (211)
    • (200)
    • (198)
    • (114)
    • (92)
    • (90)
    • (55)
    • (50)
    • (47)
    • (43)
    • (39)
    • (34)
    • (32)
    • (30)
    • (29)
    • (22)
    • (21)
    • (20)
    • (18)
    • (17)
    • (13)
    • (11)
    • (9)
    • (8)
    • (8)
    • (5)
    • (2)
    • (2)
    • (1)
    • (1)
    • (1)
  • Minimum Level of Studies
    • (6969)
    • (6961)
    • (4243)
    • (4050)
    • (4050)
    • View more »
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (4050)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (3373)
    • (8)
    • (8)
  • Working Shift
    • (6961)
    • (7)
    • (1)
  • Posting period
    • (43)
    • (1184)
    • (1969)
    • (2665)
    • (3347)
    • View more »
    • (4269)

6969 jobs found for Design Verification Engineer

Sort by:
  • Emulation / silicon validation experience. Knowledge of Perl, UNIX shell. Good communications skills, both verbal and writing. SoC Expertise/Domain Knowledge ARM processor knowledge and integration ARM AXI,AHB/APB protocol knowledge ARM AXI peripheral integration and verification Industry

  • job description � Looking for highly motivated individuals and ability to deal with ambiguity� Knowledge of considerations for performance, power and cost optimization is desirable� Ability to work in a team environment� Ability to work with external technology companies for combined development of SOCs

  • job description ?� Develop a UVM verification environment to verify the IP, subsystem and SOCs and UVM based scoreboard to verify the end to end data checking.� Assertions to check protocol design constraints.� Non-timing and Timing GLS simulations and UPF simulations in RTL and GLS ...

  • Using ICC or Innovus to fix DRCD/density/DFM/HV/LVS violations Expert in ICC2 or Innovus Familiar with Intel P1275.6 runset and design rules. Has Intel 14nm or 10nm experience and expertise. Proficient in ICC and ICC2 tools Proficient in running physical verification and able to using ICV

  • Using ICC or Innovus to fix DRCD/density/DFM/HV/LVS violations Expert in ICC2 or Innovus Familiar with Intel P1275.6 runset and design rules. Has Intel 14nm or 10nm experience and expertise. Proficient in ICC and ICC2 tools Proficient in running physical verification and able to using ICV

  • Using ICC or Innovus to fix DRCD/density/DFM/HV/LVS violations Expert in ICC2 or Innovus Familiar with Intel P1275.6 runset and design rules. Has Intel 14nm or 10nm experience and expertise. Proficient in ICC and ICC2 tools Proficient in running physical verification and able to using ICV

  • Using ICC or Innovus to fix DRCD/density/DFM/HV/LVS violations Expert in ICC2 or Innovus Familiar with Intel P1275.6 runset and design rules. Has Intel 14nm or 10nm experience and expertise. Proficient in ICC and ICC2 tools Proficient in running physical verification and able to using ICV

  • Using ICC or Innovus to fix DRCD/density/DFM/HV/LVS violations Expert in ICC2 or Innovus Familiar with Intel P1275.6 runset and design rules. Has Intel 14nm or 10nm experience and expertise. Proficient in ICC and ICC2 tools Proficient in running physical verification and able to using ICV

  • Simulations Support customers in integrating our products in their SoCs. Mentor/Lead a team of Junior Engineers Define and execute coverage-driven verification environment with Advanced Verification Methodologies. Verification plans Test cases and Coverage Modules Requirement: BTech/MTech in Electronics (ECE, ETE) Engineering Hands-on Experience in Digital Verification at Block level/System level /SoC ...

  • test plans design & develop verification environment components, write test cases, run simulations & regressions, debug test failures to identify test case issues & RTL design issues.Skills/knowledge in: 1 Digital design flow2 Proficient in C, C++/Verilog/VHDL/System Verilog & OVM or UVM3 Simulation &

  • performing SoC verification based on architectural/micro-architectural specification review and analysis followed with definition of verification requirements. Responsibilities: Candidates will be required to Work with other verification engineers, design engineers, micro-architects, integration experts ...

  • Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing. VLSI design and verification experienced with ASIC design flow, Verification of digital designs

  • Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing. VLSI design and verification experienced with ASIC design flow, Verification of digital designs

  • , development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering ...

  • Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification Expertise in verification of design blocks (IP) for system-on-chip (SoC) components , Expertise in system verilog and OVM/UVM. Develops preSilicon functional validation

  • verification experience using SystemVerilog and OVM/UVM* Strong understanding of engineering design principles* Proven track record in ASIC verification from environment development to tests development* Excellent written and verbal communication skillsJob Requirements:* BS in EE or Computer Science, Master's

  • verification experience using SystemVerilog and OVM/UVM* Strong understanding of engineering design principles* Proven track record in ASIC verification from environment development to tests development* Excellent written and verbal communication skillsJob Requirements:* BS in EE or Computer Science, Master's

  • verification experience using SystemVerilog and OVM/UVM* Strong understanding of engineering design principles* Proven track record in ASIC verification from environment development to tests development* Excellent written and verbal communication skillsJob Requirements:* BS in EE or Computer Science, Master's

Want to receive similar jobs about "Design Verification Engineer" by email?

Alert me
Go to Top