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  • Job Description: Participates in the development of Architecture and Micro-architecture specifications for the IP Logic components. Performs logic design, Register Transfer Level (RTL) coding, and simulations, designs functional units, and sub-systems for inclusion in full chip designs. Domain experience in communication technologies, architecture model development, System-C Models, Simulations for signal ...

  • Job Description: Concept and System Engineering for Modems, Routers and WLAN integrated home gateways. Chip Architect having strong understanding of Processor architecture and subsystems including Application Interfaces and understanding of application software requirements. Performs all aspects of System Engineering, architecture definition for communications ICs. Performs system simulations in C, C ...

  • Job Description: Participates in the development of Architecture and Micro-architecture specifications for the IP Logic components. Performs logic design, Register Transfer Level (RTL) coding, and simulations, designs functional units, and sub-systems for inclusion in full chip designs. Domain experience in communication technologies, architecture model development, System-C Models, Simulations for signal ...

  • Job Description: Concept and System Engineering for Modems, Routers and WLAN integrated home gateways. Chip Architect having strong understanding of Processor architecture and subsystems including Application Interfaces and understanding of application software requirements. Performs all aspects of System Engineering, architecture definition for communications ICs. Performs system simulations in C, C ...

  • Job Description: Concept and System Engineering for Modems, Routers and WLAN integrated home gateways. Chip Architect having strong understanding of Processor architecture and subsystems including Application Interfaces and understanding of application software requirements. Performs all aspects of System Engineering, architecture definition for communications ICs. Performs system simulations in C, C ...

  • Job Description: Develop pre-Silicon functional validation tests to verify system will meet design requirements. Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing. VLSI design and verification experienced with ASIC design flow, Verification of digital ...

  • Job Description: Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools. Defines and documents RTL changes required for emulation/FPGA. Develops hardware and software collaterals and integrates it with the emulation/FPGA model. Tests and debugs the emulation/FPGA model and collaterals. Defines ...

  • Job Description: Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs ...

  • Job Description: Develops and tests Engineering Design Automation tools, creates flows/scripts to analyze and test design methodologies. Specifies materials, equipment and supplies required for completion of projects. Evaluates vendor practical capabilities to provide required products or services. Responsible for designing, deploying and testing efficiency of tools to utilize in achieving design goals ...

  • Job Description: Expertise in SoC/VLSI Physical Design. Familiarity with all aspects of chip implementation from RTL to GDS - including DC Synthesis, ECO implementation, Timing constraints, Timing closure, Physical Design, Floorplanning, ICC tool know-how, Physical Verification using Mentor tools, Logic Equivalence Check, Formal verification, Power analysis using Cadence Voltus tool Master's degree in ...

  • Job Description: Expertise in SoC/VLSI Physical Design. Familiarity with all aspects of chip implementation from RTL to GDS - including DC Synthesis, ECO implementation, Timing constraints, Timing closure, Physical Design, Floorplanning, ICC tool know-how, Physical Verification using Mentor tools, Logic Equivalence Check, Formal verification, Power analysis using Cadence Voltus tool Master's degree in ...

  • Job Description: Creates bottoms-up elements of chip design including but not limited to FET, cell, and block-level custom layouts, FUB-level floor plans, abstract view generation, RC extraction and schematic-to-layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, customer polygon editing, auto-place and ...

  • Job Description: Responsible for optimizing battery life and performance across all Intel's Client Platforms on Windows OS. Working with Platform architects on defining workloads & reviewing projections. Provide technical leadership and direction while troubleshooting complex system level power / performance issues. Collaborate across teams in PEG and CCG to identify new power savings features or ...

  • Design test cases either to be manually executed or automated. Development of test automation frameworks. Actively contribute to code reviews Validate that requirements and fixes meet acceptance criteria, verify defects and ensure appropriate automation is in place Perform exploratory testing of new features and product changes Be a strong advocate for quality on the team Ensure testability in ...

  • Job Description: Participates in the development of Architecture and Micro-architecture specifications for the IP Logic components. Performs logic design, Register Transfer Level (RTL) coding, and simulations, designs functional units, and sub-systems for inclusion in full chip designs. Domain experience in communication technologies, architecture model development, System-C Models, Simulations for signal ...

  • Job Description: Participates in the development of Architecture and Micro-architecture specifications for the IP Logic components. Performs logic design, Register Transfer Level (RTL) coding, and simulations, designs functional units, and sub-systems for inclusion in full chip designs. Domain experience in communication technologies, architecture model development, System-C Models, Simulations for signal ...

  • Job Description: Develop pre-Silicon functional validation tests to verify system will meet design requirements. Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests. Analyzes and uses results to modify testing. VLSI design and verification experienced with ASIC design flow, Verification of digital ...

  • 1. Exp in Genset field is preferred. 2. Good Knowledge over IC Engines, Alternators 3. Freshers can also apply 4. Hindi and English languages are Must 5. Should be able to draft Mails in a professional way. 6. Two Wheeler & Driving Licence must

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