Sankalp Placement India P. Ltd

Mumbai, Maharashtra

Company details

Industry:
HR Consultancy
Number of workers:
49
Website:
http://www.sankalpplacement.com/

Company Description

Long known for the consistent delivery of quality personnel, Sankalp is a nationally recognized organization that has been headquartered in Mumbai, India fulfilling organizational staffing requirements.. Sankalp is known for its Executive Search and Headhunting Skills, delivers the superlative HR Solutions. Being focused on quality, our forte has been our TAT (turn around time) which is most essential.

Sankalp Placement India P. Ltd

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job postings

  • Experience of advanced custom circuit implementations. Good understanding of SRAM architecture, Critical Path Modelling, Full Cut Analysis, Marginality Analysis and Monte Carlo Simulations. Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation. Candidate must have significant exposure to ...

  • Completely own and carry out high speed SerDes IPs for consumer and telecom applications. These projects can either be new development from scratch or re-targeting current IPs to new process technologies. Work with customer engineering and internal sales on technical feasibility to determine engineering effort and delivery schedule. Support customer in debug / bring-up or work with third parties for ...

  • Responsible to provide technical leadership across projects in area of pre-silicon and post-silicon validation: must be able to juggle multiple threads and projects and be recognized as an expert by an extended team within Sankalp and customer. Coordinator for all Sankalp staff at customer location. Liaison between customer and Sankalp staff. Responsible for team technical output. Act as a consultant ...

  • The candidate should be able to develop ASIC/DFT solutions for next generation chips. Responsibilities include: - In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis. - Analyze design and propose best compression technique. - Debug and resolve the DRC issues. Work with front end team to provide the solutions and make sure DFT DRCs are ...

  • - 3 to 6 years of overall verification experience and with at least 2.5 years of SV experience - Hands-on work experience in ASIC, SoC or IP Level Verification - Hands-on experience in building Test Plans, Verification Environments, Test cases/Scenarios - Hands-on in System Verilog (SV) and OVM / UVM based methodologies - Work experience in HDMI, MIPI, DDR Memories, Ethernet,PCIe & USB

  • Create, support, and maintain CAD scripts and tools. You will debug and address tool problems raised by the design and layout communities. You will be involved in CAD tool evaluations and CAD project execution. Knowledge of CMOS semiconductor design flows. Experience with reading and writing technical documentation such as user manuals, QA reports and work instructions. Experience coding in one or more ...

  • Create, support, and maintain CAD scripts and tools. You will debug and address tool problems raised by the design and layout communities. You will be involved in CAD tool evaluations and CAD project execution. Knowledge of CMOS semiconductor design flows. Experience with reading and writing technical documentation such as user manuals, QA reports and work instructions. Experience coding in one or more ...

  • Create, support, and maintain CAD scripts and tools. You will debug and address tool problems raised by the design and layout communities. You will be involved in CAD tool evaluations and CAD project execution. Knowledge of CMOS semiconductor design flows. Experience with reading and writing technical documentation such as user manuals, QA reports and work instructions. Experience coding in one or more ...

  • To work independently on Analog layout design of block level and chip level from schematics. Hands on experience in Analog Layout design of various designs SerDes, LVDS, DDR Phy, PLL, Linear and Switching regulators and analog building blocks amplifiers, comparator, oscillator, voltage and current reference circuits etc. Good understanding of deep sub-micron and DFM issues and layout techniquesSh ould have ...

  • Skill Requirements: Hands-on in Verilog/VHDL Hands-on in Perl/Unix scripting Hands on in SoC level RTL integration Hands on in Clock Domain Crossing (CDC) checks, Linting, equivalence checks Experience in Digital module micro-architecture and design Experience in basic RTL simulation Good knowledge of Synthesis, STA and DFT aware design. Good knowledge of ARM subsystem, I2C protocol, AMBA bus Understanding ...

  • Should be proficient in RF & Analog circuit design. Should be able to independently design passive components like Power Dividers, Couplers, Attenuators, Filters, Equalizers and active components like Amplifiers, Mixers, Oscillators and Diode Switches etc. Should have minimum 2-5 years experience in RF circuit design ...

  • " Hands-on work experience in Digital Physical Design (PD) at Full Chip Level, SoC or IP Level in technologies of 40 nm and below (28nm & 14nm) Exposure to IP Hardening for blocks like SERDES, USB PHY, MIPI, SATA will be an added advantage Experience in Cadence SoC Encounter EDA Tool flow is required. At least 2 Full Chip T/O experience for 8 years experienced engineers

  • Completely own and carry out PHY development projects either from scratch or from available projects in other nodes (porting). Work with customer engineering and internal sales or pre-sales technically to determine customization feasibility, costing & delivery time. Support customer in debug / bring-up or work with third parties for certification. Such work will be a minor part of the team's charter ...

  • To work independently on Analog layout design of block level and chip level from schematics. Hands on experience in Analog Layout design of various designs SerDes, LVDS, DDR Phy, PLL, Linear and Switching regulators and analog building blocks amplifiers, comparator, oscillator, voltage and current reference circuits etc. Good understanding of deep sub-micron and DFM issues and layout techniquesSh ould have ...

  • Partner with hiring teams to build effective sourcing, assessment, and closing approaches with an ability to manage customer/partner expectations through a deep understanding of ROI. Be able to recruit passive candidates and possess the mentality to "profile people and gauge chemistry of candidates for fit and understand their motivation" rather than sell a role. Possess strong ability to screen ...

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